A new design methodology for knowledge-based analogue IC design is presented. Due to the nonlinear nature of the analogue design process, iterations are always necessary to achieve accurate and reliable designs. A prototype expert system design assistant and a conventional circuit simulator are used for the iterative design process. The expert system employed is capable of optimising circuit topologies, as well as circuit element geometries, to better satisfy the performance specifications. Circuit reconstruction is achieved through circuit primitive replacements and design equation substitutions. Circuit primitive and critical nodes are processed before layout generation to minimise undesired parasitic effects. Layout parasitics can be included optionally in the design optimisation step. Experimental results are shown, to demonstrate the effectiveness of the flexible architecture approach through iteration and the expert analogue design system.