SPEEDUP ANALYSIS OF HYPERCUBE ARRAY PROCESSOR FOR MACHINE VISION APPLICATIONS
作者:
MEHMET CELENK,
期刊:
Parallel Algorithms and Applications
(Taylor Available online 1993)
卷期:
Volume 1,
issue 3
页码: 221-242
ISSN:1063-7192
年代: 1993
DOI:10.1080/10637199308915443
出版商: Taylor & Francis Group
关键词: Low-level vision operators;hypercube processor;ring and mesh topologies;parallel implementation;image-to-processor mapping;speedup;C1.2;I4.6;I5.4
数据来源: Taylor
摘要:
Several low-level vision algorithms have been implemented on a 16-node hypercube processor (AMETEK S-14) by exploitation of its network embedding feature. This includes edge detection with the Sobel operator, histogramming, one-pass parallel binary image thinning, and noise-cleaning. The primary objective is to parallelize these algorithms by achieving a proper image-to-processor topology mapping and to determine the actual speedup factor of parallel implementation over the sequential programming. Two basic topologies used are the ring and the nearest-neighbor networks, which are mapped onto the hypercube system.
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