A scanned cw Ar+laser was used to anneal the polycrystalline silicon on nitride structures. Laser power varied from l0 to 15 W in increments of 1 W, the beam diameter was ∼40 &mgr;m and the scan rate was ∼12.5 cm/s. The measured field‐effect electron mobility of the metal‐oxide semiconductor field effect transistor fabricated on the annealed silicon increases with increasing laser power. In transistors annealed at power ⩽11 W, an intercrystalline potential barrier resulting from the electron trapping at crystallite and grain boundary regions was found to be the dominant factor in the channel electron conduction. In transistors annealed at power ⩾ 12 W, channel conduction is limited by scattering from surface structure imperfections.