A 1/fnoise model of an m.o.s. transistor is developed which verifies previously observed dependences on the geometry and the density of surface states, but in addition predicts an explicit bias dependence. This model predicts that input 1/fvoltage noise gradually increases as the gate voltage increases near threshold and continues to increase for gate voltages well above threshold. It also predicts a gradual decrease in noise as the drain voltage increases to saturation. These prediction are experimentally verified.