Several types of thin dielectric films which can be deposited on substrates held near room temperature have been tested for use as insulators in integrated circuit structures. The types of insulation studied include single and double layer SiO films, Parylene polymer films, and SiO/Parylene composites. Test structures, which were fabricated with processes used in Josephson integrated circuits, allowed measurement of the number of electrical defects per unit area in the insulation between two Pb–In–Au films as well as the number of defects along edges of the lower metal film. The SiO/Parylene composite films had the lowest defect densities, as low as 0.2 cm−2over planar metal layers and 0.001 cm−1at insulated metal edges. Defect densities below those for single SiO films were also obtained by depositing the SiO in two layers through separate but indentical lift‐off stencils. The defect densities measured for these insulating films both before and after repeated thermal cycling to 4.2 K are believed to be adequate for proposed Josephson integrated circuits.