The interfacial defects at thep‐Si epitaxial layer/p‐Si substrate interface have been studied by deep‐level transient spectroscopy (DLTS). By solving Poisson equation, the electron concentration at the defect level varied with external voltage is derived. The emission and capture of electrons at the defect level, which are not observable in conventional DLTS, can be detected simultaneously in a single temperature scan by properly choosing the experimental parameters. The experimental results show that the energy level of the interfacial defects is located atEc−0.30 eV. ©1995 American Institute of Physics.