Device and circuit trends in gigabit logic
作者:
B.G.Bosch,
期刊:
IEE Proceedings I (Solid-State and Electron Devices)
(IET Available online 1980)
卷期:
Volume 127,
issue 5
页码: 254-265
年代: 1980
DOI:10.1049/ip-i-1.1980.0052
出版商: IEE
数据来源: IET
摘要:
Recent implementations of Gbs−1integrated circuits are mentioned and used as the basis for a capability projection of the more promising technologies. After first describing the projection strategy, both the silicon and GaAs circuit families are assessed with regard to their performance limits. A shorter analysis of Josephson technology follows. For scaled down devices in silicon as well as several GaAs technologies, potential l.s.i. solutions with 2–3 GHz clock frequencies are prognosticated. The 3–6 GHz range should eventually be accessible to m.s.i. d.m.e.s.f.e.t. circuits, whereas GaAs s.d.f.l., j.f.e.t. and e.m.e.s.f.e.t. approaches promise v.l.s.i. complexity between 1 and 3 GHz. The range around 10 GHz appears to be solely a future domain of Josephson circuits (up to v.l.s.i).
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