Testing of data paths in VLSI arrays
作者:
ChoiYoon-Hwa,
期刊:
IEE Proceedings E (Computers and Digital Techniques)
(IET Available online 1990)
卷期:
Volume 137,
issue 2
页码: 154-158
年代: 1990
DOI:10.1049/ip-e.1990.0018
出版商: IEE
数据来源: IET
摘要:
An important issue in VLSI array design is how to test switches and data links in an array. In the paper, the authors present a ‘divide-and-conquer’ technique for testing data paths in VLSI arrays. The data paths including registers, switches and data links are tested in parallel by applying test patterns from the outside. The fault-free paths identified divide the array into smaller subarrays with fault-free boundaries so that testing can be done recursively. Fault masking due to switch failures is examined. A sufficient condition to avoid fault masking is obtained.
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