Universal shift matrix
作者:
L.E.M.Brackenbury,
P.J.Wells,
J.B.Gosling,
期刊:
IEE Proceedings E (Computers and Digital Techniques)
(IET Available online 1990)
卷期:
Volume 137,
issue 1
页码: 57-64
年代: 1990
DOI:10.1049/ip-e.1990.0005
出版商: IEE
数据来源: IET
摘要:
Serial shifting techniques are slow whereas a totally parallel approach, though fast, is impractical for implementational reasons. A novel intermediate approach is presented whereby circular shifting is performed over two or three levels depending on the factorisation of the shift lengthn.The use of read-only memories to control its operation and to provide arithmetic and logical shifting produces a hardware structure which can be automatically generated by software for use in cell-based integrated circuit design. This implementation is compared for CMOS and bipolar differential mode logic.
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