The results of an investigation of the effects of varying the deposition rate on the surface morphology and electrical characteristics of low‐temperature (Tdep=775 °C) epitaxial silicon are presented. The data indicate that the electrical characteristics are a strong function of the growth rate, even more so than the deposition temperature. Varying the growth rate by a factor of 16 varies the minority‐carrier lifetime and reverse‐bias diode leakage current by five orders of magnitude, and has a strong impact on the surface morphology of the epitaxial layer. Deposition conditions will be reported that yielded a minority‐carrier lifetime of 480 &mgr;s, which is the highest lifetime reported in low‐temperature epitaxial silicon.