Linear floating CMOS resistors and four‐quadrant multiplier
作者:
Dong‐Shiuh Wu,
Yuh‐Shyan Hwang,
Yan‐Pei Wu,
期刊:
Journal of the Chinese Institute of Engineers
(Taylor Available online 1995)
卷期:
Volume 18,
issue 6
页码: 857-866
ISSN:0253-3839
年代: 1995
DOI:10.1080/02533839.1995.9677753
出版商: Taylor & Francis Group
关键词: linear floating CMOS resistors;four‐quadrant multiplier
数据来源: Taylor
摘要:
Two linear floating CMOS resistors, which are tunable by dc control voltage, and a CMOS four‐quadrant multiplier are presented. Second order effects due to mobility reduction, channel length modulation and transistor mismatch are addressed. SPICE simulations, using 3μm‐pwell parameters and a ±5V power supply, indicate that the total harmonic distortion (THD) of the proposed resistor is lower than 0.5% for applied voltages up to 1.5V amplitude, and that the 3‐dB bandwidth of the proposed resistor circuit is about 20MHz. The experimental results of discrete circuits are given to verify the theoretical analysis.
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