This paper discusses the current state of ion-implantation as applied to MOS technology. It is shown how impurity doping by ion-implantation is used to produce self-aligned MOS gate structures. The reduction in circuit capacitance gives the designer a choice of higher switching speed or lower power dissipation. The availability of a linear resistor of value 1–10 kω/□ allows many new circuit techniques to be applied to monolithic circuits. This paper discusses ion-implantation technology, device design, and circuit performance. A number of implanted circuits are shown. Finally, improvements to the present technology which are still in the R & D phase are described.