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Focal plane charge detector for use in mass spectrometry

 

作者: Keith Birkinshaw,  

 

期刊: Analyst  (RSC Available online 1992)
卷期: Volume 117, issue 7  

页码: 1099-1104

 

ISSN:0003-2654

 

年代: 1992

 

DOI:10.1039/AN9921701099

 

出版商: RSC

 

数据来源: RSC

 

摘要:

ANALYST, JULY 1992, VOL. 117 1099 Focal Plane Charge Detector for Use in Mass Spectrometry Keith Birkinshaw Department of Physics, University College of Wales, Aberystwyth, Dyfed SY23 3BZ, UK Since the advent of the microchannel plate (MCP) electron multiplier, the design of photon, electron and ion focal plane detectors (FPDs) has been an active but specialized research area. Recent rapid advances in support of integrated circuit design have brought powerful high-technology tools into the reach of research groups requiring custom FPDs. Focal plane detectors with an MCP front end are used in mass spectrometry, ultraviolet spectrophotometry, electron energy loss spectroscopy, etc., and are outlined. The design of a working charge detector on silicon is described and the proposed design of a new high-resolution FPD based on this detector is presented, with an explanation of the trade-offs made between the many design variables. Keywords: Focal plane charge detector; mass spectrometry; silicon sensor The term ‘focal plane detector’ (FPD) implies the simul- taneous detection of a spatially resolved spectrum over a section of the focal plane of an instrument which is much wider than that sampled by a single slit.In a magnetic sector mass spectrometer, for example, an FPD would cover several mass units of the mass spectrum instead of a fraction of a unit. A crude FPD would be a photographic plate, which, after exposure, would be scanned with a microdensitometer to extract the spectrum. This is, of course, extremely inconve- nient with no time resolution and has a low sensitivity and dynamic range and a non-electrical output, but has the advantages of small size, high collection efficiency and low cost.The need for a high-resolution FPD to replace the single detector of a high-resolution magnetic sector mass spec- trometer has been evident for a long time. Likewise, the need in ion and electron scattering experiments is equally felt. The primary aims of the FPD designer are to design a detector with a high collection efficiency, high resolution and low cost (production and running costs) while equalling or bettering other important aspects of performance, including noise immunity and low power consumption, and hence mass spectra can be accumulated more rapidly and very small samples can be analysed accurately. There has been a gradual evolution of detectors of various types over the past two decades which has followed the evolution in technology.Only those detectors which consist of a microchannel plate (MCP) electron multiplier followed by an anode or array of anodes (with emphasis on one-dimensional arrays) will be considered. The information on the spatial distribution of ions, electrons or photons falling on the MCP is amplified and transmitted as pulses of electrons to underlying anodes. It is the development of the MCP that has allowed the advance of this type of detector design. As technology has advanced there has been a gradual reduction in the size and cost of detector electronics, which has permitted the high level of integration proposed here.Anode configurations of high resolution have not been a limitation ( e . g . , resistive strip,l one-dimensional array of metal strips,2J wire grids4), but total integration of anodes and associated electronics on a silicon chip, although an obvious step,5.6 has awaited a reduction in circuitry size. Richter and H o ~ have reviewed FPDs (position-sensitive detectors) and their relevance to time-resolved electron energy loss spectroscopy. This paper summarizes develop- ment to date of focal plane charge detectors (FPDs) and describes an FPD design undertaken at Aberystwyth. In spite of their high development costs, FPDs are cost effective in expensive projects such as satellite and space shuttle experiments. Indeed, the latter was the stimulus for much investment in detector design.2.4.R11 Technology similar to that needed for the above FPD design is also needed for nuclear particle detection5.12 and this has contributed to the knowledge and momentum in this area.Early FPDs had a high collection efficiency and high resolution, but only at low count rates (up to about 106 counts s-1) as the logging of one event must be completed before the next occurs. Later FPDs, with the benefits of new technology, integrated discrete detector sites and more of the associated electronics on single chips so that the simultaneous detection of particles at many sites and a high collection efficiency at high total count rates are possible. Two important distinctions between an FPD and the traditional defining slit/single detector should be noted.First, the resolution of the single slit is not influenced by the multiplier or detector but only by the slit. This is not the case for an FPD incorporating an MCP, where resolution is lost at the interface. Where a stack of two MCPs is used to amplify the signal further, resolution is also lost at the MCP-MCP interface. The electro-optical FPD discussed below has several interfaces with loss of resolution at each one. Second, variations in sensitivity across an array could occur owing to variations in the MCP sensitivity andor sensor sensitivity. Again, this problem does not arise for a single detector. Sensor design and MCP quality should minimize this problem. Remaining variations could be removed by calibration and software correction or by sampling each part of the spectrum by each detector, i.e., by scanning the spectrum across the detector array.The direct implication of the potentially very high data collection rate for a detector array is that data must be accumulated on-chip as they cannot be shifted over the bus at a sufficiently high rate and it is not feasible to have an external output pin for each detector of a high-resolution detector array with, say, 400 detectors cm-1. Hence it is necessary to have a dedicated counter associated with each charge sensor, but the higher the number of counter bits, the greater is the area of the chip and the lower the yield. There is, therefore, a trade-off between number of counter bits and yield. The Aberystwyth design involved a careful trade-off between many such parameters, some of which are explained below.The market for FPDs is relatively small and, therefore, the driving force for their development on silicon has not come from volume sales, where most of the design expertise has been traditionally concentrated. The need for FPDs is felt most in areas where there is little silicon design expertise and the driving force is a large increase in efficiency of very expensive apparatus. Because of the rapidly falling costs and increasing accessibility of design tools, custom FPD design is now within the range of lower cost projects in industry and research. The major problem is the lack of know how of users,1100 ANALYST, JULY 1992, VOL. 117 but those developing skills in this area will be poised to take advantage of the rapid advances in silicon technology which will result in lower cost and higher performance.This paper outlines the development of FPDs over the last 20 years and explains the choice of the key features in the proposed design of a new FPD at Aberystwyth. Types of Focal Plane Detector Several types of FPD are given in Table 1, each of which incorporates an MCP. The performance of each FPD is summarized and references to original work are given. Figures in the table are taken from the references. The figure for the resolution for the discrete anodes is the array length divided by the number of anodes. Resistive Strip This consists of a thin layer of resistive material (e.g., carbon) of typical length 2 cm and resistance 20 kS2 deposited on an insulating substrate with metallized ends.Electrical connec- tions are made to the ends. A pulse of electrons from the MCP falls on the resistive strip and travels to both ends. The pulses arriving at each end are measured (arrival time or charge) and this gives the position of the pulse to about 50 pm.13 The count rate is limited by the difficulty of distinguishing signals for more than one e k n t at a time. Wire Grids A one-dimensional array of thin wires placed underneath an MCP will collect an electron pulse on several wires and the centre of gravity of the pulse can be interpolated.14 Crossed grids have been used to locate an electron pulse in two dimensions.4 For an n x rn array of wires only n + rn amplifiers are needed, but the maximum count rate is again limited by the difficulty of resolving more than one pulse at a time.Mainly one-dimensional grids are considered here. A one-dimensional array of wires is a discrete anode array but is distinguished from those listed under Discrete Anodes by its usage. The grid wires (anodes) are used to measure the profile of a single electron pulse and hence calculate accurately the position of the pulse, but only at low particle flux. To achieve both high resolution and high collection efficiency at high count rates (see under Discrete Anodes) necessitates the logging of the position of arrival of many particles at the same time. The implication for the design is that many independent detectors of high spatial resolution with associated electronics are needed. In addition, the MCP must be positioned close to the anode array so that resolution is not lost by spreading of the MCP output pulse.Metal Anodes on Substrate This is electrically equivalent to the wire grid method but the detector anodes are deposited on an insulating substrate. Metal Apodes on MCP Anodes can be deposited directly on the back face of an MCP and the collected chargepulses measured. Normally the faces of the MCP would be uniformly metallized leaving channels open, but in this instance strips of metal are deposited on the rear surface of the MCP, blocking the channel exits. Coded Anodes Charge falling on, e.g., 1024 detector anodes is capacitatively coupled to ten underlying perpendicular tracks. The track widths are coded so that each of the 1024 detector anodes produces a different pattern of coupled signals on the underlying tracks.Wedge and Strip This device consists of only three interdigitated electrodes, each with its own charge-sensitive amplifier. The width of the electrodes varies in the x and y directions so that the relative signals give the x and y positions of a pulse of charge. Discrete Anodes These arrays consist of many self-contained detectors. It is possible to have many configurations of anode, e.g., annular, radial, but each has its own charge sensor and counter. It is distinguished from the wire grid by the higher density of anodes and electronics which can be achieved by current Table 1 Survey of FPDs Event logging capacity Method Single Resistive strip Wire grids Metal on substrate Metal on MCP Coded anodes Wedge and strip Multiple Discrete anodes Electro-optical [charged-coupled detector (CCD>I (Photodiode array) Anode sizelmm 22 x 12 25 dia.0.025 dia. 0.1 dia. 25 x 0.4 6.5 x 0.025 3 x 0.225 25 x 3 13 x 0.015 Interdigitated 1.3 x 0.025 3.18 x 0.25 2 x 0.3 4 x 0.015 7.5 x 0.8 Array lengt h/mm 22 25 4 [6 x 6 20 30 18 (30 dia.) 26 35 (2D)I 3.2 50 5 50 - No. of anodes 1 1 80 30 x 30 40 1024 40 7 1024 3 64 96 16 50 - Resolution/ CLm 300 50 50 10 300 - - 3000 25 50 50 520 310 25 lo00 - 256 photosites - - - - - - Ref. 1 13 14 4 9 8 15 9 11 10 2 16 3 17 18 19 20ANALYST, JULY 1992, VOL. 117 / Detector anode 1101 Pulse Switch - Pulse I m 1 fabrication technology, and instead of observing a charge envelope, the MCP is placed closer to the detector anodes so that the charge is distributed over a narrower range and ideally a single pulse can be counted on a single anode.In order to obtain a comparison of performance with a 2 cm long resistive strip and wire grid FPDs, consider a 2 cm long discrete anode array. At 25 pm resolution there will be 800 independent detectors and hence the maximum count rate will be about 800 times that of the resistive strip and wire grid FPDs, with the restriction that the count rate at any individual detector cannot exceed about lo7 counts s-l. The maximum count rate at a single detector is limited by two other factors. First, in order to obtain an undistorted spectrum two particles should not arrive at the same detector within 100 ns of each other or only one event will be registered, i.e., the pulse pair resolution is about 100 ns.Considering the statistical distribution of arrival times, this limits the maximum count rate to about 106 counts s-l. Second, a detector anode of dimensions 15 x 4000 pm can be activated by about lo00 channels of an MCP whose channels are set on a 12 pm pitch. If each channel has a recovery time of 10-2 s, this means that the maximum count rate is about 105 counts s-1. Taking into account the statistical distribution of the particle arrival times, this means that the maximum count rate is limited by the MCP to be about 104 counts s-1 per anode. Hence the maximum count rate is dominated by the MCP and not the response time of the detector electronics. Higher performance MCPs are available with a lower channel resistance and hence lower recovery time, but which also have a greater power dissipation.. Electro-optical The basis of this technique is to place a phosphor screen after the MCP to convert the electron pulses to photons and then detect the photons. Two methods for photon detection are focusing onto a CCD19 or channelling through a fibre-optic bundle onto a light-sensitive diode array.*O The collection efficiency is high but resolution is lost at several interfaces and the device is bulky and expensive. Microchannel Plate Electron Multiplier The development of the MCP was a necessary precursor to the development of FPDs. However, the advances in silicon technology have been so rapid that it is the MCP which now limits the performance of FPDs. Dynamic Range Consider a single channel of an MCP.The capacitance of the channel is typically 10-16 F and its resistance is typically 1014 Q. A particle falling on the channel initiates the generation of a pulse of electrons which discharges the voltage across the capacitance, and this voltage must recover before the arrival of a second particle or the gain will be reduced. As a rough guide, this recovery time is related to RC, or 10-2 s in the present example. The lowering of the gain at increasing particle count rate has been observed experimentally.2~9~13 Clearly, reducing R will reduce the recovery time but it will also increase the heat dissipation owing to the greater standing current across the MCP. Lower resistance MCPs are currently available but dissipate more energy by ohmic heating.Resolution Microchannel plates are often used in pairs for extra amplifica- tion of the detected particles and to reduce ion feedback. The spacing between the MCPs is typically set to 50 pm and the output from a single channel of the first MCP will activate several channels of the second MCP, giving an output pulse of about 106 electrons within 1 ns. The separation between the second MCP and the FPD is a critical factor in determining the FPD resolution.2>6 The smaller the separation and the greater the attractive voltage applied to the FPD, the smaller is the spreading of the electron pulse. However, it has been observed and calculated2.6 that if the separation is much greater than the channel diameter, the beam spreading cannot be effectively reduced by reasonable values of the attractive field.With careful setting of the MCP-array separation to typically 50 pm, a single particle leads to an electron shower from the lower MCP which spreads to typically 70 pm. Discrete Anode FPD Design The following sections describe the proposed Aberystwyth FPD design. The sensor and the counterhnterface described have been fabricated and are functional.17 The array described is currently under development and the factors which have determined important array design parameters are explained. Full operational tests of the array require mounting it in a high-resolution mass spectrometer with an interface that will exercise it at its maximum rate of operation. This is also under development and results will be reported elsewhere.Sensor A block diagram of a single detector is shown in Fig. 1. The detector anode is a strip of aluminium on the top surface of the integrated circuit (IC). It forms the input to the charge-sensing circuit and its capacitance can be reduced and hence the sensitivity of the detector increased by either reducing the area of the anode or increasing the thickness of the insulator between it and the underlying substrate.3J1 Charge of sufficient magnitude falling on the anode is sensed by the charge sensor (described below) and a pulse is transmitted to the counter (described below). The voltage generated by electrons falling on the anode could be a small fraction of a volt to many volts. The sensor input stage is a switch driven by the detector anode. The equilibrium voltage on the anode is VDIS and this holds the switch open. A small negative pulse on the anode closes the switch and triggers a cycle which both generates a 5 V pulse and pulls the anode back to VDIS via the discharge means.If VDIS is moved closer to the switching voltage, then less negative charge is required to switch the circuit and hence the sensitivity of the sensor can be simply varied. Positive pulses can be detected by setting VDIS to hold the switch closed. The output base voltage level is then high and a small positive pulse opens the switch, triggers a discharge cycle and generates a negative-going 5 V output pulse. The dead time of this sensor is only its switching time. This is in contrast to detectors which require the clocking of a measurement cycle and a reset cycle.Here the sensing of a charge pulse triggers both the generation of a 5 V pulse and self-discharge. Charge III Fig. 1 Block diagram of the self-resetting charge sensor circuit1102 ANALYST, JULY 1992, VOL. 117 Charge 101 Ill /I Detector anode L{$F 107 o v 105 15v Po v Fig. 2 Schematic transistor level sensor circuit Voltage level on detector anode (Net 101 \ VDIS 1 Fig. 3 Model of the charge sensor operation in terms of a hysteresis diagram A transistor level circuit is shown in Fig. 2. Others which implement the functions shown in Fig. 1 are under investiga- tion. The following considers the transistors as switches. It should be remembered that transistor switching is not an instantaneous process. Initially transistor M1 is open (not passing current), M2 is closed and M3 is open.A small negative pulse on net 101 closes M l and lowers the gate-source voltage of M2, which opens. The 106 voltage rises as M2 opens, which feeds back to close M1 and open M2 further. The voltage on net 105 is pulled down and this drives the output inverter (M4/M5) to give a positive output pulse. M3 is closed and 101 is discharged back to VDIS. Any charge falling on the detector anode which is insufficient to trigger the latter cycle is discharged with a time constant of about 50 ns. This will reduce the effects of ‘blooming’ but will have a negligible effect on the voltage pulse height of a typical 1 ns charge pulse from the MCP. The circuit operation can be understood from a hysteresis diagram (Fig. 3). A negative pulse on 101 lowers the voltage below the lower hysteresis level, the circuit switches, gener- ates a 5 V pulse and discharge of 101 returns the circuit to its initial condition above the upper hysteresis level.It can also be seen that the lower the hysteresis gap, the greater is the sensitivity of the sensor until a limit of a zero gap. The sensor can be designed to measure positive or negative d.c. current by removing the discharge resistor Rdis. Consider- ing negative current, charge accumulates on the detector electrode until the induced voltage reaches the lower hystere- sis level. This initiates the cycle which generates an output pulse and discharges the accumulated charge. The frequency of the output pulse is proportional to the incoming current.Countedhterface A schematic diagram of the 8 bit counter and control logic is shown in Fig. 4. The circuit is relatively simple and self- explanatory. Shift register / 8 Bit counter R (in) -AAad R (out) Input I 1 pulse I - Fig. 4 Schematic diagram of the counter-bus interface circuit Main bus Detector electrodes and charge sensors Fig. 5 Detector array not to scale. Charge sensors are situated beneath detector electrodes and are connected to counters by metal tracks Pulses from the charge sensor are gated to the counter and counting is stopped when the counter reaches 252 counts (MAXCNT goes high), which prevents overflow and allows three extra counts to be accumulated during the stopping time. This allowance of three counts is entirely adequate to prevent overflow in both modes of operation mentioned below.Counting is also stopped when the counter is being read (EN is high) and when an external signal is asserted (STCIN is high). Detection Array The layout of an array of the detectors is shown in Fig. 5. Associated with each detector electrode is a charge sensor and a counter-bus interface. At a resolution of 25 pm there will be 400 electrodes cm-1. This means, of course, that 400 copies cm-1 of the associated circuitry must be placed on the chip. The detector electrodes are distributed along one side of the chip with the charge sensors underneath the electrodes. Pulses are routed to associated 8 bit counters arranged in banks. A local bus is associated with each counter bank and each local bus is buffered onto the main bus.Ideally the whole of a long detector array would be placed on a single chip, but yield will prevent this in the foreseeable future and, therefore, smallerANALYST, JULY 1992, VOL. 117 1103 chips will be butted on a substrate and stitched together to form a long detector. A separate circuit is being designed to interface between the detector array and an external com- puter. The array can operate in two modes. In Mode 1, when the external controller recognizes that one of the counters has reached 252 counts (STCOUT asserted), it inhibits all further counting (by asserting STCIN) and then reads all the accumulated counts. This gives a complete mass spectrum with all peaks relatively correct. In Mode 2 the counters are read cyclically and continuously. This mode will detect low intensity ions at maximum efficiency but the spectrum may contain flat-topped peaks.In both modes counters are automatically reset after they have been read. Optimum Design At Aberystwyth, the key requirements of a mass spectrometer were identified at the outset and all these requirements were incorporated in the FPD design. This involved many trade- offs, some of which are mentioned below. The key require- ments were identified as a high collection efficiency, high resolution, high sensitivity and low noise, low power con- sumption and low cost (high yield, high lifetime, ease of assembly, etc.). This shortlist has many implications for the design. The following explains the trade-offs made between design parameters to achieve the requirements listed above.Anode dimensions The model for the anode array is shown in Fig. 6. Consider a fixed anode width ( w ) and separation ( s ) from adjacent anodes. Cross-talk depends on the ratio of the inter-anode capacitance (C,,) and the anode-to-substrate capacitance (Gas): cross-talk = C,$(C,, + Gas), and for low C,,, cross-talk = Caa/Cas. Both fall at roughly the same rate and the cross-talk will remain roughly constant as the anode length is reduced. However, as the anode capacitance decreases, its sensitivity increases and, therefore, a small value of 1 should be chosen consistent with the required collection efficiency. Consider a detector anode of fixed length and inter-anode spacing. As the anode width increases (and hence the anode pitch), its capacitance increases but the inter-anode capaci- tance remains the same and hence the cross-talk is reduced.If the electron pulse from the MCP is much wider than the anode, then, although the anode capacitance increases with width, the collected electrons also increase at roughly the same rate and hence the sensitivity is not a strong function of width. The compromise chosen for the anode pitch of 25 pm is approaching half the expected MCP electron pulse width. Greater than this gives a reduction in sensitivity and resolu- tion. Less than this gives an increase in cross-talk, more circuitry and no great improvement in resolution or sensi- tivity. Insulator Ah77 Substrate Fig. 6 optimum design (see text for details) Model of the sensor array used in the calculation of the For a fixed anode length and width, a larger spacing between the anodes reduces the collection efficiency and increases the insulating surface area where charge build-up may occur.Smaller spacing increases cross-talk. Therefore, it should be as small as possible consistent with cross-talk limits. In summary, the optimum dimensions for a particular application can be found as follows. Choose the minimum value of 1 consistent with a good collection efficiency. Decide the allowable cross-talk and equate this with the detector parameters: C,, = lw/h c,, = ltls Let the allowable cross-talk be 7%. Therefore, cross-talk = C,$C,, = (ltls) (hllw) = hthw = 7/100 For h = 10 pm and t = 1 pm, sw = 143 (larger value gives lower cross-talk) . In this simple calculation it is assumed that the insulator is present between electrodes and hence the relative permittivity can be omitted.The minimum allowable value of s is fixed by the silicon process used. In the current design a value of 10 pm was chosen for s and 15 pm for w , giving an over-all resolution of 25 pm. A higher resolution implies both greater cross-talk and a larger detector array with a correspondingly lower yield, as there are more detectors and associated circuitry per unit length. Counter size Consider a 10 cm long detector containing 4000 detectors. Assume the read time per counter is about 0.4 X 10-6 s. For 4000 counters, the read time (t,) is about 1.6 X 10-3 s. Assume the maximum count rate per detector is determined by the MCP and is about 104 counts s-1. At this rate, an 8 bit counter will fill in about 256/104 s or about 25 ms (ts), and a 4 bit counter will fill in 16/104 s or about 1.6 ms (t4).In mode 1 (stop and read), the dead time for a 4 bit counter would be t,/(t, + t4) = (1.6 x 10-3)/(3.2 X 10-3) = 50%, and that for an 8 bit counter would be t,/(t, + ts) = (1.6 x 10-3)/(26.6 x 10-3) = 6%. In mode 2 (continuous read), t, = t4 and hence 4 bit counters should be adequate. Considering the much reduced circuitry and increased yield when using 4 bit instead of 8 bit counters, it may be best to use the former if possible. Higher performance devices with improved MCPs require more than 4 bits if maximum collection efficiency is to be achieved, but it should be realized that reducing the read time or the array length by a factor of two is equivalent to adding one counter bit.Mode 2 is the only mode necessary if sufficiently large counters are used. Sensor characteristics In order to collect ions efficiently at high ion intensity, the pulse pair resolution of the detectors should be high. The switching cycle of the charge sensor during the detection of an event is about 100 ns, giving a maximum pulse count rate of about 107 Hz. The electron pulse emerging from the MCP will fall on more than one anode. Charge from the periphery of such pulses must not build up on detector anodes and give spurious counts or there will be a ‘blooming’ effect and a loss of resolution. The sensor has been designed so that charge build-up on the anodes does not occur, and it is insensitive to noise below about 10 MHz.Both of these features can be achieved by exploiting the fact that the duration of a charge pulse from an MCP is very short (about 1 ns), so that charge can be drained through a resistor from the anode with a time constant of say 50 ns without significantly affecting the peak of the anode voltage pulse.1104 ANALYST, JULY 1992, VOL. 117 Fabrication technology Power consumption should be kept to a minimum. Circuit performance degrades at increased temperature and as cooling in a vacuum is inefficient it is important to select a fabrication technology that dissipates little energy. CMOS satisfies this requirement and is a leading technology undergo- ing constant development. Most power is dissipated in digital CMOS circuits during switching and the maximum dissipation of sensors (not CMOS) and counters is about 0.25 W cm-1.FPD Interface Hosticka22 considered the prospects of VLSI readout and signal processing integrated with detectors on a single chip. The FPD designed at Aberystwyth has basic intelligence, as discussed above, and could be controlled through a very simple interface by an external computer, but in many applications the constraints of an existing system to which the sensor device is to be interfaced will often necessitate an intermediate interface to mesh the FPDs facilities and demands into the existing system without extensive redesign. It is important to keep the cost of the new interfacing scheme to a minimum consistent with obtaining optimum system performance. The Aberystwyth interface accumulates data from the sensor array at the maximum rate of the latter, outputs it on a slow serial line and provides a physical interface between high- and low-voltage environments.The burden of the interfacing and the performance enhan- cement is best located off the detector array itself, for several reasons, including the following: to retain the modularity of the array design; yield (the array will be large and increasing the size by including the interface on the same IC as the array itself would reduce the yield); and the interface design is greatly simplified by using existing ICs. The design of the interface will be the subject of a later publication. This work is supported by the LINK Industrial Measurement Systems programme, Vacuum Generators Analytical (Fisons Instruments), and ICI (Wilton).The assistance of the Ruther- ford-Appleton laboratory and the Edinburgh Microfabrica- tion Facility is acknowledged. The support and discussions of T. M. McGinnity, D. P. Langstaff, M. W. LawtonandD. M. Forbes are also gratefully acknowledged. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 References Moak, C. D., Datz, S., Santibanez, F. G., and Carlson, T. A., J. Electron Spectrosc. Related Phenom., 1975, 6 , 151. Timothy, J. G., and Bybee, R. L., Appf. Opt., 1975, 14, 1632. Hatfield, J. V., York, T. A., Comer, J., and Hicks, P. J., IEEE J. Solid-state Instrum., 1989, 24, 704. Kellog, E., Henry, P., Murray, S., and van Speybroeck, L., Rev. Sci. Instrum., 1976,47,282. Heijne, E. H. M., and Jarron, P., Nucl. Instrum. Methods Phys. Res., 1984,226, 12. Asplund, L., Gelius, U., Tove, P. A., Eriksson, S. A., and Bingefors, N., Nucl. Instrum. Methods Phys. Res., 1984, 226, 204. Richter, L. J., and Ho, W., Rev. Sci. Instrum., 1986, 57, 1469. Timothy, J. G., and Bybee, R. L., SPIE, 1981,265, 93. Liptak, M., Sandie, W. G., Shelley, E. G., Simpson, D. A., and Rosenbauer, H., IEEE Trans. Nucl. Sci., 1984, NS31,780. Martin, C., Jelinsky, P., Lampton, M., Malina, R. F., and Anger, H. O., Rev. Sci. Instrum., 1981, 52, 1067. McClintock, W. E., Barth, C. A., Steele, R. E., Lawrence, G. M., and Timothy, J. G., Appl. Opt., 1981, 21, 3071. Walker, J. T., Parker, S., Hyams, B., and Shapiro, S. L., Nucl. Instrum. Methods Phys. Res., 1984, 226, 200. Firmani, C., Ruiz, E., Carlson, C. W., Lampton, M., and Paresce, F., Rev. Sci. Instrum., 1982, 53, 570. Gott, R., Parkes, W., and Pounds, K. A., IEEE Trans. Nucl. Sci., 1970, NS17, 367. Padmore, T. S., Roberts, K. M., Padmore, H. A., and Thornton, G., Nucl. Instrum. Methods Phys. Res., 1988, A270, 582. Gurney, B. A., Ho, W., Richter, L. J., and Villarubia, J. S., Rev. Sci. Instrum., 1988,59,22. Birkinshaw, K., McGinnity, M., Langstaff, D. P., Lawton, M. W., and Forbes, D. M., Sensors Technology, Systems and Applications, Adam Hilger, Bristol, 1991, pp. 421-426. Adams, N. G., and Smith, D., J. Phys. E, 1974,7, 759. Hicks, P. J., Daviel, S., Wallbank, B., and Comer, J., J. Phys. E , 1980,13,713. Cotrell, J. S., and Evans, S., Rapid Commun. Mass Spectrom., 1987, 1, 1. Dettmer, R., IEE Rev., 1988, 411. Hosticka, B. J., Nucl. Instrum. Methods Phys. Res., 1984, 226, 185. Paper 1 I050396 Received October 2, 1991 Accepted February 13, 1992

 

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