Fault detection and correction in array computers for image processing
作者:
W.R.Moore,
期刊:
IEE Proceedings E (Computers and Digital Techniques)
(IET Available online 1982)
卷期:
Volume 129,
issue 6
页码: 229-234
年代: 1982
DOI:10.1049/ip-e.1982.0043
出版商: IEE
数据来源: IET
摘要:
The paper addresses the problems of detecting and correcting faults that may occur in arrays of processors used for image processing. The variety of useful hardware and software solutions is reviewed. It is shown that faults can be corrected efficiently by bypassing the faulty column of the array, and a novel technique is described which detects processor faults with a very modest increase in circuitry. The addition of a parity check on the memory is sufficient to give an effective and efficient detection and correction of all permanent and many transient faults. Additionally, the use of a full parity processor increases the proportion of transient faults detected.
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