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Single wafer process integration for submicron structures

 

作者: N. A. Masnari,  

 

期刊: Journal of Vacuum Science&Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena  (AIP Available online 1994)
卷期: Volume 12, issue 4  

页码: 2749-2751

 

ISSN:1071-1023

 

年代: 1994

 

DOI:10.1116/1.587186

 

出版商: American Vacuum Society

 

关键词: INTEGRATED CIRCUITS;SEMICONDUCTOR TECHNOLOGY;WAFERS;CVD;HEAT TREATMENTS;IN−SITU PROCESSING;MANUFACTURING;PROCESS CONTROL;COST ESTIMATION

 

数据来源: AIP

 

摘要:

As semiconductor technology moves toward reduced feature size, increased device density, and larger diameter wafers, there is increasing need for reliable, economical,insitu, single‐wafer processing under low‐thermal budget conditions. Two promising techniques to do this are rapid thermal processing and remote plasma‐enhanced chemical vapor deposition. The integration of such processing techniques together with proper surface preparation has significant potential for meeting the fabrication needs at the deep submicron level. The extension of suchinsituprocessing to include the clustering of multiple processing tools is another step in the development of low‐thermal‐budget,insitu, single‐wafer processing. Such cluster tools require the development of well‐controlled high throughput technologies that are cost effective and compatible with high‐yield manufacturing.

 

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