The paper describes Reed-Muller universal logic modules (RM-ULMs) and their use for the implementation of logic functions given in Reed-Muller (RM) form. A programmed algorithm is presented for the synthesis and optimisation of RM-ULM networks. The level-by-level minimisation procedure is based on the selection of control variables at different levels with the aim of maximising the number of discontinued branches and hence minimising the number of modules required to implement a given function. The algorithm is programmed in Fortran and can be used to realise fixed-polarity generalised Reed-Muller (GRM) expansions of any polarity and any number of variables.