Silicon oxides were rf magnetron sputtered onp-type silicon wafers, and annealed in the temperature range from 700 to 1000 °C for furnace annealing and from 950 to 1050 °C for rapid thermal annealing. The annealed oxides in metal–oxide–semiconductor structures were stressed with a constant current. Stability was monitored by midgap voltage and interface states density. The optimum condition to achieve the best electrical stability was furnace annealing at about 900 °C. It gives the least value of generated interface states and trapped charge after the electrical stress. A close relation between positive charge trapping and interface states generation is observed.