The barrier heights of the electrodepositedn‐type CdTe thin‐film metal semiconductor (MS) and metal‐thin insulating layer‐semiconductor (MIS) devices have been measured by internal photoemission. The data for both MS and MIS devices can be fit with the square root of the photocurrent per absorbed photon dependence consistent with the Fowler theory. The barrier height of Ni‐CdTe is 0.75 eV at room temperature, and its temperature dependence is about the same as that of the CdTe band gap. This suggests that the barrier height is pinned with respect to the CdTe valence band edge. Oxidation in air at 300 °C for an hour produces a layer of about 25 A˚ or TeO2on the CdTe surface. Thicker oxide can be grown for longer oxidation time. Negative oxide charges are found in some devices. At room temperature, the barrier height of Ni‐TeO2‐CdTe is 0.92 eV. As temperature is decreased, the barrier height increases and its rate of change with temperature is less than that of the CdTe band gap. Samples stored in room atmosphere show aging effects, one of which is the increase in surface‐state density. The dips in the curve of the spectral dependence of the relative photon‐induced current are caused by electrons which drift to the metal after being photoexcited from occupied surface states below the Fermi level. These dips correspond to peaks in the energy distribution of the surface state density. At zero bias and 170 °K, four peaks at 1.02, 1.06, 1.18, and 1.26 eV are observed for the MIS devices. For the MS devices zero biased at room temperature, four peaks at 0.85, 0.94, 1.02, and 1.05 eV are observed. The magnitudes of the dips at 0.85, 0.94, 1.18, and 1.26 eV vary with bulk‐defect density and these levels shift towards higher energy as temperature is decreased. On the other hand, the levels at 1.02 and 1.05 eV for the MS devices and 1.02 and 1.06 eV for the MIS devices are independent of temperature and bulk defect density.