首页   按字顺浏览 期刊浏览 卷期浏览 High-throughput, reduced hardware systolic solution to prime factor discrete fourier tr...
High-throughput, reduced hardware systolic solution to prime factor discrete fourier transform algorithm

 

作者: K.J.Jones,  

 

期刊: IEE Proceedings E (Computers and Digital Techniques)  (IET Available online 1990)
卷期: Volume 137, issue 3  

页码: 191-196

 

年代: 1990

 

DOI:10.1049/ip-e.1990.0023

 

出版商: IEE

 

数据来源: IET

 

摘要:

The paper discusses a novel systolic implementation of the row-column method for solving the prime factor discrete Fourier transform (DFT) algorithm. It deals, in particular, with the two-factor decomposition where the transform lengthNis an odd multiple of 4. By processing the four-point row-DFTs coefficient by coefficient, rather than DFT by DFT, as is conventionally done, it is seen how pipelined implementations of the row-DFT and column-DFT processes can be performed simultaneously, without need for matrix transposition of the row-DFT output, resulting in a fully pipelined concurrent solution. Hardware efficiency and simplicity is achieved via the computationally attractive Cordic (co-ordinate digital computer) arithmetic, withO(N) throughput requiring (asymptotically) one-quarter of the hardware requirements of establishedN-processor solutions.

 

点击下载:  PDF (724KB)



返 回