Matrix and vector multiplications are widely used in signal processing in operations such as FIR and IIR filtering, feature extraction and classification. Frequently, signal processing must be done in real time requiring the use of special purpose VLSI hardware. Regular structures such as systolic arrays are well suited for matrix and vector operations and are also amenable to VLSI implementation. This paper describes efficient systolic arrays for matrix and vector multiplication, at both word and bit levels, and outlines three applications relevant for signal processing: a convolver, an IIR filter and a linear classifier.