There is a well established and growing need for fast digital processors and fast digital systems generally in many areas of application. In the design of sequential logic in particular, the problems of clock skew and the fact that the clock period is essentially determined by the speed of the slowest parts of the system are significant limiting factors. Consequently, attention is turning to asynchronous, self-timing, systems to provide a way of achieving extra speed in time-critical applications. Designers may well argue that asynchronous circuitry is difficult to design and prone to all sorts of hazards and potential instability problems but, on the other hand, the clock distribution layout of very fast synchronous systems is also quite difficult to design and simulate. Traditional asynchronous design methods are, in the opinion of the author, quite cumbersome and often difficult to use. Attention is therefore turning to ways of improving asynchronous circuit representation and design processes. An alternative way of approaching the representation and design of asynchronous sequential systems is to take an ‘event-driven logic (EDL)’ or ‘transition-based’ approach. In concept, the approach taken is to define the initial conditions of a system in terms of the logic level assumed by each variable and then to describe subsequent system behaviour in terms of the transitions (changes in logic level, also called events) of those variables. The paper pursues this approach, making use of special operators and introducing appropriate EDL functions and design processes.