Design of type 2 diaital phase-locked loops
作者:
P.Atkinson,
A.J.Allen,
期刊:
Radio and Electronic Engineer
(IET Available online 1975)
卷期:
Volume 45,
issue 11
页码: 657-666
年代: 1975
DOI:10.1049/ree.1975.0127
出版商: IERE
数据来源: IET
摘要:
The practical importance of digital phase-locked loops in which the phase error should be zero under locked conditions and in which frequency capture is automatically achieved has led naturally to the development of type 2 loops. The optimum design of these essentially non-linear, sampled data systems has led to digital computer studies in both the frequency and time domains. A universal frequency domain design chart is described which allows design for which relatively stable operation over a range of working is guaranteed. The paper includes a worked example and gives elementary rules of thumb for the prediction of settling time and bandwidth.
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