The fabrication of nanometer‐scale side‐gated silicon field effect transistors using an atomic force microscope is reported. The probe tip was used to define nanometer‐scale source, gate, and drain patterns by the local anodic oxidation of a passivated silicon (100) surface. These thin oxide patterns were used as etch masks for selective etching of the silicon to form the finished devices. Devices with critical features as small as 30 nm have been fabricated with this technique. ©1995 American Institute of Physics.