Design of parallel counters using the map method
作者:
K.J.Dean,
期刊:
Radio and Electronic Engineer
(IET Available online 1966)
卷期:
Volume 32,
issue 3
页码: 159-162
年代: 1966
DOI:10.1049/ree.1966.0070
出版商: IERE
数据来源: IET
摘要:
This paper describes how a counter may be designed to follow any desired code. The method is illustrated by the design of a parallel counter operating in the 5211 binary-coded decimal mode and which uses J-K flip-flops. The modules for the complete design are available as silicon integrated circuits. The minimized input conditions for a number of other coded decade counters are also stated.
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