GaAs diode/f.e.t. logic circuits for high-speed-frequency-divider applications
作者:
J.Mun,
G.S.Sanghera,
S.D.Vanlint,
B.E.Barry,
期刊:
IEE Proceedings I (Solid-State and Electron Devices)
(IET Available online 1980)
卷期:
Volume 127,
issue 2
页码: 98-99
年代: 1980
DOI:10.1049/ip-i-1.1980.0018
出版商: IEE
数据来源: IET
摘要:
This research note reports an improved circuit for GaAs diode/f.e.t. logic that is particularly suited for high-speed-frequency-divider applications. It is also demonstrated that there is a substantial power-reduction advantage in diode/f.e.t. logic over buffered-f.e.t. logic, even on single uniformly doped GaAs active layers. Comparisons have been made on these two logic approaches on i.c.s using nominally two-micrometre-gate-length f.e.t.s.. Propagation delays of 200 to 300 ps at 3 to 4 mW power consumption have been measured on diode/f.e.t. logic gates. Similar propagation delays are observed on buffered-f.e.t. logic, but at up to six times the bias power.
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