Targeting very thin equivalent oxides (<1 nm) requires the deposition of (very) thin dielectrics onto silicon surfaces with minimal interfacial oxide. Typically, high‐k dielectric layers are deposited using ALD or MOCVD with, at present, a prime emphasis on Hf‐based high‐k dielectrics, either as pure HfO2, as silicate, or mixed with Al2O3. Depending on the deposition conditions, serious deficiencies in terms of film closure and material density occur for the ultra thin (<3 nm) films which are required for very small EOT’s. As such, critical metrology needs arise enabling one to study details of the film growth and its evolution upon thermal anneal. As discussed in this paper, many tools are required such as Rutherford Backscattering Spectrometry and high‐resolution elastic recoil detection (ERDA), Low Energy Ion Scattering, Time‐of‐flight SIMS, (spectroscopic) ellipsometry and X‐ray photoelectron spectroscopy. When trying to correlate these different methods one must be aware of potential discrepancies due to non‐homogeneous growth and reduced material density. Local electrical measurements based on tunneling atomic force microscopy reveal very fine scale inhomogeneities, which can be correlated to local structural defects. © 2003 American Institute of Physics