A new theoretical model for electrical conduction in polycrystalline silicon under optical illumination is introduced to investigate the effect of grain size, illumination level, temperature, and grain‐boundary scattering effect on the carrier mobility and resistivity of polycrystalline silicon by considering the variation of grain‐boundary space‐charge potential barrier height (Vg) with these parameters. This theory is based on the assumption that the grain‐boundary scattering effect on carrier transport is represented by a rectangular potential barrier with a constant width of 20 A˚ and height &fgr;. It is found that this barrier cannot be completely eliminated by lowering the temperature, while the barrierVgcan be removed in some cases, especially when the illumination level is very high and the grain size is large. Our theory predicts that the carrier mobility is approximately proportional to the temperature in the temperature range 100–125 K and approximately proportional toT−2/5between 125 and 200 K. Computations show that the dependence of resistivity and carrier mobility of illuminated polysilicon on grain size is large at small grain sizes and at low temperatures and illumination levels.