Non‐contact electrical metrology includes a variety of characterization techniques used to determine a number of material/device electrical parameters. These powerful methods, used on full wafers at various processing stages, complement the traditional device‐based contact electrical (capacitance‐voltage and current‐voltage) measurements of MOS‐based structures. The non‐contact electrical techniques are usually built around measurements of surface photovoltage and surface voltage in combination with illumination and corona charge deposited on a sample. In principle this allows recombination lifetime, minority carrier diffusion length, and iron contamination density to be determined for bulk silicon; generation lifetime, doping density and doping profile to be measured for near‐surface silicon; and equivalent oxide thickness, oxide charge density, mobile charge density, total charge density, flat band voltage, dielectric integrity and other parameters to be obtained for dielectric films. Interface trap density can be used for qualification of the interface between silicon and dielectric. The non‐contact nature of these measurement techniques is particularly attractive because it makes most of them non‐destructive, non‐invasive and allows for diagnostics in the wafer processing stages, rather than waiting for final device characterization. Some methods offer high‐resolution full‐wafer mapping capabilities. A few of them are destructive by design such as the soft‐breakdown field measurements. Most of the non‐contact electrical measurements offer excellent process step isolation, and opportunity for integrated metrology. They are less expensive, do not require fabrication of the test structures, and require significantly less preparation and measurement time compared to the traditional MOS‐device based analogues. This early and short loop measurement capability is the most important feature. In some circumstances the fast turn‐around of the product characterization has so high priority that it makes a lower accuracy and/or frequent calibrations, necessary for some non‐contact electrical techniques, tolerable (however, if there is no final correlation to device performance they are useless!). In this paper we review the non‐contact electrical measurement techniques most often used in the semiconductor industry for characterization of bulk silicon, near‐surface silicon, dielectrics and interface between silicon and dielectric films. We provide a comparison of the experimental data with the theory derived from widely accepted publications [1–5], and discuss the potential sources of discrepancies between the theory of some non‐contact measurements and their implementation in commercial products. These potential discrepancies could cause systematic inaccuracy in measurements and disagreement between metrology using equipment fabricated by different vendors, resulting in considerable standardization challenges for the semiconductor industry. We highlight concerns when applying ASTM standards developed for non‐contact electrical measurements [6 – 8] to current characterization of new semiconductor and dielectric materials. The goal of this paper is to demonstrate advantages and also the challenges in the non‐contact electrical measurements, to define the problem areas and to provide recommendations for possible improvements and directions to overcome existing problems. © 2003 American Institute of Physics