Experimental measurements and simulations are used to provide an overview of key issues with the electrical characterization of metal‐oxide‐semiconductor (MOS) devices with ultra‐thin oxide and alternate gate dielectrics. Experimental issues associated with the most common electrical characterization method, capacitance‐voltage (C‐V), are first described. Issues associated with equivalent oxide thickness extraction and comparison, interface state measurement, extrinsic defects, and defect generation are then overviewed. © 2003 American Institute of Physics