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Degradation of passivated aluminum metallization by mechanical and electrical stress

 

作者: Manfred Schneegans,   Gerhard M. Zorn,  

 

期刊: AIP Conference Proceedings  (AIP Available online 1994)
卷期: Volume 305, issue 1  

页码: 111-125

 

ISSN:0094-243X

 

年代: 1994

 

DOI:10.1063/1.45702

 

出版商: AIP

 

数据来源: AIP

 

摘要:

Mechanical stress in aluminum metallizations during thermal cycling has been investigated byin‐situhigh‐temperature X‐ray diffraction and optical curvature measurements. The X‐ray diffraction method delivers true stress in thin aluminum films even if barriers and passivation layers are present. Plastic flow of aluminum starts at temperatures above 200 °C. Local stress—caused by precipitations in the AlSiCu alloy—disappears at increasing temperature. This is indicated by increasing sharpness of the diffraction peaks. Si dissolves in aluminum between 450–500 °C and recrystallizes in the same temperature range. On cooling, the diffraction peaks stay sharp until plastic flow freezes at around 200 °C and Si grains create local stress in aluminum by lattice deformation again. In pure aluminum films the effect of peak sharpening is, as a consequence, much smaller. The macrostress in thermally cycled aluminum obtained by optical curvature measurements is nearly identical to that measured by the X‐ray technique. In passivated aluminum lines the Si‐recrystallizations preferentially precipitate near the line edges. Typical degradation of aluminum during electromigration tests corresponds to void‐hillock formation. The critical void‐hillock distances decrease with increasing current density, indicated by increasing ohmic resistance. The degradation process of passivated structures starts with crack formation in the passivation and is followed by hillock growth through the cracks and coincident void formation in the metal lines until interruption. The requirements to a suitable quick response test method for characterization of passivated metal lines led us to the development of an accelerated measurement technique at the wafer level using a new designed test structure. Monte Carlo simulations confirmed by experimental results demonstrate a reduced Median Time to Failure and lowered Standard Deviation.

 

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