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Process-parameter variability in the manufacture of m.o.s. integrated circuits

 

作者: F.H.Reynolds,   J.W.Stevens,  

 

期刊: Proceedings of the Institution of Electrical Engineers  (IET Available online 1977)
卷期: Volume 124, issue 6  

页码: 505-507

 

年代: 1977

 

DOI:10.1049/piee.1977.0099

 

出版商: IEE

 

数据来源: IET

 

摘要:

The integrated circuits produced on a manufacturer's process line incorporate a standardised m.o.s. transistor providing a set of seven process-parameter values per die at the wafer-probe stage. A statistical analysis of the parameters measured on batches of wafers withdrawn in consecutive weeks from the line shows that the batches received different process treatments. A similar analytical procedure applied to the individual wafers of the batches yields the more surprising result that the wafers were also dissimilarly processed.

 

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