首页   按字顺浏览 期刊浏览 卷期浏览 Modelling and analysis of bridging faults in emitter-coupled logic (ECL) circuits
Modelling and analysis of bridging faults in emitter-coupled logic (ECL) circuits

 

作者: S.M.Menon,   A.P.Jayasumana,   Y.K.Malaiya,   D.R.Clinkinbeard,  

 

期刊: IEE Proceedings E (Computers and Digital Techniques)  (IET Available online 1993)
卷期: Volume 140, issue 4  

页码: 220-226

 

年代: 1993

 

DOI:10.1049/ip-e.1993.0032

 

出版商: IEE

 

数据来源: IET

 

摘要:

With the recent achievement of lower power and higher densities, bipolar ECL technology is expected to be used widely in high performance digital circuits. Recent investigations have revealed that bridging faults can be a major failure mode in ICs. The paper presents a detailed analysis of bridging faults in ECL. Certain bridging faults manifest as stuck-at faults. Effects of bridging faults between logical units without feedback and logical units with feedback in ECL are presented. An analytical approach is presented for computation of logic levels at ECL outputs under varying unknown bridging resistances. Effects of bridging faults and bridging resistances on output logic levels in ECL have been examined along with their effects on noise immunity.

 

点击下载:  PDF (872KB)



返 回