The semiconductor industry is moving toward the use of damascene processes for wiring of circuits on chips. These processes are based on the etching of vias and trenches into dielectric layers, filling these features with metal, and finally chemical–mechanical polishing, which results in a planarized, embedded feature. A two‐layer feature, typically a pad or trench with a via at the bottom which connects to some underlying contact is known as ‘‘dual damascene.’’ Ionized magnetron sputter deposition has been used to successfully fill these two‐layer features, both with AlCu and Cu metallurgies. This process uses conventional, commercial manufacturing‐scale magnetrons in combination with a dense, inductively coupled rf discharge to ionize a large fraction of the sputtered atoms. A small electrical bias on the sample then causes the metal ions to deposit at normal incidence, which results in dense fills at moderate aspect ratios (AR = 2:1) on room temperature samples.