The wire delay in the deep-submicron era increases in proportion to the square of a scaling factork.The computer-aided design tool described here routes multilevel wires with variable width and spacings reduces the dependence of specified local net delay to dependence on1/kand reduces the dependence of specified global net delay to dependence onk.The increase in the number of specified nets in future LSIs makes LSI design prohibitively complex unless a multilevel interconnection using a low-resistivity material or a low-permittivity material is used. The design tool might also be useful in improving the electromigration hardness of the structure, but some of the parameters for this are still unknown. ©1998 American Institute of Physics.