We present evidence of Si diffusion in 100 A˚ layers of CoSi2grown by room‐temperature codeposition and annealing on Si(111) substrates. By monitoring the intensity of the Co MVVand Si LVVAuger peaks, we find a Si‐rich surface layer after annealing, in agreement with the results of others. We find that this layer can be removed by chemical etching and re‐formed by subsequent annealing. By measuring the intensity of the plasmon energy loss peak associated with the Co L23VVAuger peak, we conclude that the Si must exist on top of the CoSi2and we obtain the effective Si overlayer thickness as a function of annealing temperature by calibrating the plasmon loss data against known overlayer thicknesses on unannealed samples. We find similar results on samples grown both with and without the addition of a 10 A˚ Si cap to prevent pinhole formation in the CoSi2and we have indications that the same type of diffusion occurs also beneath the native oxide layer on samples that have not had the surface Si removed by chemical etching. In all of the samples studied, Si diffusion was observed to be non‐negligible at temperatures on the order of 400 °C, which is well below the point where pinhole formation is first observed. This result suggests that the diffusion does not depend on the presence of observable pinholes as previously thought.