The slips on a silicon wafer edge which normally occur during rapid thermal process have been eliminated by forming an oxide ring on the wafer‐back surface, thereby reducing the light reflectance from the silicon wafer edge. A simple model which gives the optimum ring oxide thickness and width has been proposed. From the model, it has been found that about 3000 A˚ thickness of ring oxide gives the best thermal compensation effect. The effect of nonuniform irradiation on the wafer has been incorporated in the model by introducing light power uniformity (LU) factor. In case of 3300‐A˚‐thick, 7‐mm‐wide ring oxide and 0.86–0.88 of LU, the temperature variation on a 3‐in. wafer is within ±4 °C at 1137 °C, and the slip is completely eliminated.