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Hierarchical design of delay-insensitive systems

 

作者: P.N.Lam,   H.F.Li,  

 

期刊: IEE Proceedings E (Computers and Digital Techniques)  (IET Available online 1990)
卷期: Volume 137, issue 1  

页码: 41-56

 

年代: 1990

 

DOI:10.1049/ip-e.1990.0004

 

出版商: IEE

 

数据来源: IET

 

摘要:

A set of building blocks is presented for the hierarchical design of delay-insensitive systems. It consists of delay-insensitive (DI) building blocks and hybrid (non-DI) building blocks. An extended signal transition graph (STG) model is used for circuit specification and analysis. It permits the clear specification of delay-insensitive circuits, distinguishing between environment/module behaviour and DI/non-DI components. A hierarchical composition procedure is described for the composition of deterministic STG specifications. As an example, a circuit for distributed mutual exclusion is designed and implemented.

 

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