Floating gate effects in high‐power semiconductor‐metal eutectic composite transistors
作者:
P. G. Rossoni,
M. Levinson,
B. M. Ditchek,
期刊:
Journal of Applied Physics
(AIP Available online 1991)
卷期:
Volume 70,
issue 5
页码: 2861-2865
ISSN:0021-8979
年代: 1991
DOI:10.1063/1.349349
出版商: AIP
数据来源: AIP
摘要:
Novel field‐effect transistors (FETs) with unusual high‐power capabilities have been demonstrated previously. They are fabricated using the grown‐in metal‐semiconductor junctions of semiconductor‐metal eutectic composite materials. Here, computer modeling has been used to examine the relation between their exceptional resistance to avalanche breakdown and the effects of floating gate junctions between the gate and drain. Calculations are presented that show how composite geometry and materials parameters could be optimized to give extremely large off‐state blocking voltages combined with low series resistance. These transistors should, in principle, be capable of an on‐state power dissipation lower than that of any conventional high‐voltage FET device.
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