The measurement and reduction of noise in coincident-current core memories
作者:
P.Cooke,
D.C.Dillistone,
期刊:
Proceedings of the IEE - Part B: Electronic and Communication Engineering
(IET Available online 1962)
卷期:
Volume 109,
issue 47
页码: 383-389
年代: 1962
DOI:10.1049/pi-b-2.1962.0222
出版商: IEE
数据来源: IET
摘要:
Ferrite-core stores are at present the most suitable high-speed memory system for use in a parallel digital computer. The relevant properties of ferrite memory cores and the way in which they are interconnected and interrogated in a coincident-current core store are reviewed, and some specific limitations are considered.The paper is based on an experimental investigation into the noise voltages which can appear on the sense wire of a coincident-current memory plane using ferrite cores. There are two largely independent types of asymmetry which can occur in a cancelling pair: (a) the information held may be different and (b) the final half-current disturbances may have been in opposite senses. The ‘worst noise’ condition arises when (a) and (b) are present together in such a way that their effects add. Means by which this pattern can occur in a practical memory are discussed, and waveforms are presented to illustrate the phenomena. A ‘post-write-disturb’ pulse, staggered read currents and a split sense wire can reduce the noise by ten to one. A rectangular sense-wire threading can largely eliminate the shock-excited decaying oscillations produced by stray couplings.
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