A general purpose accelerator for digital system design
作者:
TomCarlstedt-Duke,
期刊:
Computer-Aided Engineering Journal
(IET Available online 1989)
卷期:
Volume 6,
issue 3
页码: 99-103
年代: 1989
DOI:10.1049/cae.1989.0023
出版商: IEE
数据来源: IET
摘要:
With the growing acceptance of simulation tools for the analysis and verification of digital circuits, and the ever increasing complexity of digital system designs involving multiple ASICs and complex commercial VLSI components, designers are demanding increased performance from the design tools. This paper outlines the problems associated with accelerating design verification tools focused for system-level design. The architecture of a commercially available general purpose hardware accelerator is then described to see how these problems can be addressed.
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