In this work the role of extended defects on the electrical performance of epitaxial silicon on substrates containing an insulating SiO2layer has been examined. The buried SiO2layers in the substrates were obtained by two techniques: implantation of oxygen and zone melt recrystallization. In order to make a thorough structural and electrical evaluation of silicon on the insulator substrates, 5‐&mgr;m‐thick epitaxial capping layers have been simultaneously deposited via chemical vapor deposition on representative insulating substrates and reference wafers. The average minority‐carrier lifetime was found to vary from 2.5 to 242 &mgr;s depending on the density and distribution of dislocations emerging from the capping epitaxial layer.