A superconducting sampler for Josephson logic circuits
作者:
C. A. Hamilton,
F. L. Lloyd,
R. L. Peterson,
J. R. Andrews,
期刊:
Applied Physics Letters
(AIP Available online 1979)
卷期:
Volume 35,
issue 9
页码: 718-719
ISSN:0003-6951
年代: 1979
DOI:10.1063/1.91266
出版商: AIP
数据来源: AIP
摘要:
A method is described for automating a technique which is used to sample transition duration (rise time) in superconducting logic circuits. The method is based on measuring the time at which a biased Josephson junction switches under the influence of an applied signal. The system transition duration is limited primarily by time jitter which is estimated to be 7 ps. Transition durations of as little as 9 ps have been observed.
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