A GaAs on Si coplanar technology by molecular‐beam epitaxy, that is suitable to combine GaAs and Si circuits on chip is reported. Coplanarity is obtained after the GaAs is grown embedded in masked wells in the Si substrate, which were formed by wet chemical etching with a controlled solution of HF:HNO3. Scanning electron microscope and profiling studies show the extreme flatness and the intentional misorientation of several degrees of the recessed surfaces. A possible process is proposed to realize a coplanar surface by lifting off polycrystalline GaAs with the masking dielectric. The GaAs surface step height remaining after liftoff is<0.6 μm for a 2‐μm‐thick deposit. Metallization without loss of continuity is performed over the GaAs to Si border with evaporated metal lines, 150 nm thick and 1.25 μm wide, indicating the feasibility of interconnecting side by side integrated devices in both semiconductor materials.