Ferroelectric memory FET with Ir/IrO2electrodes
作者:
Takashi Nakamura,
Yuichi Nakao,
Akira Kamisawa,
Hidemi Takasu,
期刊:
Integrated Ferroelectrics
(Taylor Available online 1995)
卷期:
Volume 9,
issue 1-3
页码: 179-187
ISSN:1058-4587
年代: 1995
DOI:10.1080/10584589508012922
出版商: Taylor & Francis Group
数据来源: Taylor
摘要:
We proposed a MFMIS structure having a floating gate as a bottom electrode between a ferroelectric thin film and the gate SiO2. Conventional gate SiO2can be used and ferroelectric thin films can be grown on bottom electrodes which have a good matching with the ferroelectric materials due to adopt the MFMIS structure. Ir and IrO2on poly-Si were used as floating gate. When a IrO2layer was formed between PZT and poly-Si, a high-quality PZT thin film was obtained and the PZT films show no fatigue up to 1012cycles of switching pulses. From the ID-VGcharacteristics measurement for 1·2 μm P-ch MFMIS FET, the shift in Vthor the memory window for a bias sweep of ±15V was about 3·3V. The difference of ID-VDcurves which corresponded to ID-VGcharacteristics were found between before and after a programming pulse was applied.
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