摘要:

AbstractAn oscillator using a surface acoustic wave resonator is capable of directly generating fundamental frequencies in the region beyond VHF. In this paper, a surface acoustic wave resonator using a reflector consisting of aluminum ridges on a LiTaO3substrate is studied. It is shown that this resonator exhibits a high Q with smaller chip size and has better frequency reproducibility than conventional reflectors on quartz and LiNbO3. A surface acoustic wave resonator having a suitable resonance circuit is designed, using experimental data and results of one analysis of the resonance conditions of the resonant circuit.Finally, a surface acoustic wave resonator suitable for an RF converter IC is designed for application to the oscillator of video tape recorder and is evaluated. the resultant video tape recorder resonator has good reproducibility, suitable for mass production.

ISSN:8756-6621    

DOI:10.1002/ecja.4400660112

出版商:Wiley Subscription Services, Inc., A Wiley Company    

年代:1983

数据来源: WILEY

摘要:

AbstractPropagation of millimeter waves in a semiconductor dielectric waveguide is controlled by illuminating the waveguide by light with a photon energy larger than the forbidden gap because of the generation of plasma. A theoretical and experimental study is made of this and the effects of waveguide size and plasma layer thickness on attenuation and phase shift are analyzed for various illumination intensities. Further, the modulation characteristics are examined in relation to the response of the plasma density. A shorter plasma recombination time is found to be favorable for high speed control, but this requires intense illumination to maintain the required plasma density. A test made with a Si waveguide at 50 GHz substantiates the usefulness of this technique and the validity of the theory.

ISSN:8756-6621    

DOI:10.1002/ecja.4400660113

出版商:Wiley Subscription Services, Inc., A Wiley Company    

年代:1983

数据来源: WILEY

摘要:

AbstractUntil now, a refresh operation, which is necessary in using MOS dynamic RAMs, has made MOS dynamic RAMs more difficult to use compared with static RAMs. On the other hand, with advances in MOS dynamic RAMs, new refresh modes, i.e., automatic and self refresh modes, become available when a spare pin is applied to a refresh control signal. In 64Kbit MOS dynamic RAMs, pin 1 can be such a refresh control terminal if the substrate bias is generated on‐chip. Circuit considerations in accommodating the automatic and self refresh modes by pin 1 are discussed, with special attention given to the on‐chip refresh address counter and the timer used during the self refresh. A practical 64Kbit MOS dynamic RAM has been realized with the chip area increase of 1.6% and the standby current increase of 0.3 mA as the result of implementing the automatic and self refresh mo

ISSN:8756-6621    

DOI:10.1002/ecja.4400660114

出版商:Wiley Subscription Services, Inc., A Wiley Company    

年代:1983

数据来源: WILEY

摘要:

AbstractThis paper describes the design of a masterslice LSI with two‐input equivalent 6000 gates (three‐input 4000 gates). It uses 2 μm CMOS dual Al interconnect process technology and has application to medium and small computers, terminals and peripheral equipment. It is shown that a three‐input bent‐type gate basic cell effectively realizes high integration because various logic gates can be constructed with small areas. to realize high speed, the chip is designed in several blocks. the intra‐block net uses short interconnects, whereas the inter‐block net is driven by buffers with high load drive capability. Special clock supply circuits for small clock signal skew and a register‐file to accommodate a small capacity RAM into LSI are designed. the number of wiring channels is determined based on the theoretical wiring length, and it has been confirmed that channel utilization agrees with the theoretical value. Since it is important that a masterslice LSI be designed to its specifications within a short time, a method is developed to calculate accurately the circuit delay time during the design. Evaluation of the test LSIs shows that the average gate delay time of 1.81 ns is obtained; this agrees to within 5.4% of the calcula

ISSN:8756-6621    

DOI:10.1002/ecja.4400660115

出版商:Wiley Subscription Services, Inc., A Wiley Company    

年代:1983

数据来源: WILEY

ISSN:8756-6621    

DOI:10.1002/ecja.4400660101

出版商:Wiley Subscription Services, Inc., A Wiley Company    

年代:1983

数据来源: WILEY