摘要:

A design procedure for Maitra cascades is considered in the Rademacher-Walsh spectrum. Transition into the spectral domain enabled the formulation of a procedure in which this problem is simply solved. Examination of cascade readability of the function is based on values of defined pairs of spectral coefficients, and the spectrum of the residual function is simply defined from the spectrum of the initial function.

DOI:10.1049/ip-e.1983.0024

出版商:IEE    

年代:1983

数据来源: IET

摘要:

Interconnection networks have extensive applications in switching and reconfigurable multiprocessor systems. A number of multistage networks which can achieve a limited number of permutations have been discussed in the literature [1]. On the other hand, rearrangeable networks [6] have the property that any idle input/output pair can be connected. In most parallel-processing applications, a specified set of input/output connection patterns are required. Often these patterns cannot be achieved by networks like shuffle exchange, cube, Omega and baseline. The chief objective of the paper is to present a methodology for multistage interconnection network design. This design generally requires less switching elements than the rearrangeable network. The paper relies on the formulation of a transmittance matrix for the network. The properties of this matrix are studied with particular focus on rearrangeable networks. A control algorithm which determines the switch states required to achieve a particular permutation is established. The switching algebraic approach is particularly well suited to address the network design problem, because the switch states are explicitly exhibited in the transmittance matrix.

DOI:10.1049/ip-e.1983.0025

出版商:IEE    

年代:1983

数据来源: IET

摘要:

Increasing use of microprocessors in discrete equipment has led to renewed interest in multiprocessing systems. The need for research into design criteria relating to the construction of multimicroprocessors is readily apparent. One of the major areas requiring investigation relates to the use of shared memory within the multimicroprocessor. A research vehicle, CYBA-M, has been constructed, incorporating two types of sharedmemory area, whose modes of operation are described. The programmable features of the design are indicated, together with their effects on the access characteristics of the memories. The ability to alter simply the sharedmemory access characteristics enables a designer to optimise the performance of the memories for a range of application studies. Initial performance measurements are presented for each of the shared-memory areas.

DOI:10.1049/ip-e.1983.0026

出版商:IEE    

年代:1983

数据来源: IET

摘要:

The probability of error analysis is presented for single and multiple-output combinational logic systems which are constructed from gates subject to internal soft errors. A general model is described which accounts for the soft errors by allowing the output of each gate in a realisation to fail temporarily, possibly introducing an error at one or more of the outputs. In the model, an internal noise variable is defined for each gate in the realisation. The input variables are also permitted to be random, but no assumptions except statistical stationarity are imposed. General equations for the probability of error at the system's outputs are developed. In these expressions, the effects of the system realisation appear in the Walsh transforms of an extended logic function and are separated from the Walsh characteristic functions containing the statistical parameters describing the soft errors and the inputs. Computational techniques for calculating the system performance, including fast-transform algorithms are examined. Performance curves for examples involving single and multiple-output systems, and based upon realistic probability distributions, are given. The role of redundant coverings for a particular case is studied in detail.

DOI:10.1049/ip-e.1983.0027

出版商:IEE    

年代:1983

数据来源: IET