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1. |
Low-level-device programming with a high-level language |
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IEE Proceedings E (Computers and Digital Techniques),
Volume 127,
Issue 2,
1980,
Page 37-44
S.J.Young,
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PDF (979KB)
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摘要:
This tutorial paper describes how device hardware may be programmed directly from a Pascal-like high-level language. The familiar data types of Pascal are extended to include information which specifies a mapping onto device hardware, and concurrent programming constructs are introduced as a natural environment for low-level I/O programming. Examples of interrupt-driven I/O are presented, and existing language designs are discussed.
DOI:10.1049/ip-e.1980.0009
出版商:IEE
年代:1980
数据来源: IET
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2. |
Aids - an integrated design system for digital hardware |
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IEE Proceedings E (Computers and Digital Techniques),
Volume 127,
Issue 2,
1980,
Page 45-54
P.W.Foulk,
J.A.McLean,
R.A.Mason,
P.J.O'Callaghan,
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PDF (1355KB)
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摘要:
A computer-aided-design system is described which is aimed at the expression, analysis, implementation and realisation of any type of computer system, but is of most value in those systems exhibiting parallelism. A formal model has been specially developed with parallel systems in mind. The model uses a directed-graph representation which is suited to the illustration of hardware algorithms. To enable conventional terminals to be used to describe designs a textual input form of the model has been developed, and is specified'. A design is validated, tested for correctness, implemented in an intermediate hardware description language and finally realised in terms of chips whose electrical descriptions reside in a maintained integrated-circuit database.
DOI:10.1049/ip-e.1980.0010
出版商:IEE
年代:1980
数据来源: IET
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3. |
Formal description of computational structure in aids |
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IEE Proceedings E (Computers and Digital Techniques),
Volume 127,
Issue 2,
1980,
Page 55-63
P.W.Foulk,
J.O'Callaghan,
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PDF (1179KB)
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摘要:
This paper discusses level 1 of the ‘Aids’ computer-aided digital design system. At this, the architecture level, the designer maps out his basic structure of control and data flow using a formal directedgraph model of computations. By expressing his ideas in a special-purpose language, called G, he is able to submit the design to certain analysis tools.
DOI:10.1049/ip-e.1980.0011
出版商:IEE
年代:1980
数据来源: IET
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4. |
Cascade networks of logic functions built in multiplexer units |
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IEE Proceedings E (Computers and Digital Techniques),
Volume 127,
Issue 2,
1980,
Page 64-68
A.J.Tosser,
D.Aoulad-Syad,
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PDF (426KB)
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摘要:
Abstract: A graphical method is presented for implementing logic functions by means of a cascade of 2n-input multiplexers. The method is particularly easy to use for functions of up to four variables, but is valid for any function that can be represented on a Karnaugh map, i.e. with up to six variables. Examples are given showing its use with completely and incompletely defined functions.
DOI:10.1049/ip-e.1980.0012
出版商:IEE
年代:1980
数据来源: IET
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5. |
Testing for numerical computations |
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IEE Proceedings E (Computers and Digital Techniques),
Volume 127,
Issue 2,
1980,
Page 69-76
M.Karpovsky,
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PDF (709KB)
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摘要:
We consider the problem of error detection in programs or specialised devices computing real functions f(x), where the argument x is represented in binary form. For error detection we use the linear check inequalities |∑τεTf(x⊕ τ) −C| ≤ ε, where ε ≥ 0 is some given small constant, ⊕denotes componentwise addition mod 2 of binary vectors, T is some set of binary vectors and C is a constant. A method for the construction of a minimal check set T and constant C for the given f(x) and ɛ is proposed. This method is based on the techniques of Walsh transforms and least-absolute-error polynomial approximation. Several important examples of optimal checks for programs computing exponential, logarithmic and trigonometric functions will be given.
DOI:10.1049/ip-e.1980.0013
出版商:IEE
年代:1980
数据来源: IET
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