摘要:

At first it is shown how large networks can be represented in an illustrative way. Then, the special aspects of neural networks are discussed. When conditional association arrays and semantic memories are plotted as networks surprising similiarities arise, but important characteristic differences can be seen too. The first experiments suggest that substantial progress in text processing may be achieved faster with conditional association networks than with neural networks.

DOI:10.1049/ip-e.1989.0046

出版商:IEE    

年代:1989

数据来源: IET

摘要:

In the area of non-numerical data processing, the usual local addressing with its fixed access path is troublesome and time-consuming if very large data sets have to be handled. Next to the well-known software procedures more and more hardware solutions are sought for supporting the typically content-addressable data access. The apparently ideal solution of a parallel associative memory cannot be implemented in the capacities of mass memories, but it can be substituted for mass memories with content addressability.

DOI:10.1049/ip-e.1989.0047

出版商:IEE    

年代:1989

数据来源: IET

摘要:

The paper describes a new concept for the design of parallel-working associative memory and processor architectures, which is able to process arithmetical operations as well as complex search-operations for the sets of data in parallel. The proposed concept is based on a transformation method. It maps a set of word-oriented data into flag-oriented data. Each word of the set is represented each by a flag in a flagvector. The position of a flag in the flagvector is defined by the transformation and corresponds to the value of the transformed word. To obtain parallelism for various operations, the flags of the flagvector will be processed simultaneously. The result of these operations will also be flags. They can be retransformed to word-oriented data. A new algebra called flag-algebra to investigate operations on the flagvector will be introduced. This algebra is the isomorph to the set-theory and Boolean algebra. The most important axioms and laws of calculation in this algebra will be described. They can be seen as a substantial basis for the development of flag-oriented hardware systems. Based on this algebra, the architecture of an associative monoprocessor will be presented to process arithmetical as well as complex search operations in parallel. Furthermore, some languages adequate for this architecture and the performance of the processor will be discussed.

DOI:10.1049/ip-e.1989.0048

出版商:IEE    

年代:1989

数据来源: IET

摘要:

For the next computer generation, which may have extensive artificial intelligence properties, the use of associative processing may have increasing importance. Here, VLSI technologies especially can stimulate the development of larger content-addressable memories (CAMs). The problem of production yield and component failure, as well as that of efficient testability, will be as important as for other computer components. Therefore, compared with conventional random access memory, the more complicated memory structure of CAMs has greater problems of testing and reconfigurability. In the paper, the problems of testability and fault tolerance in different CAMs and content-addressable processor systems are discussed.

DOI:10.1049/ip-e.1989.0049

出版商:IEE    

年代:1989

数据来源: IET

摘要:

The architecture of a new associative processor array chip, working name GLiTCH, is described and details are given of the techniques used in its VLSI design. The low-level operating characteristics of the chip are explained. A number of system configurations are explored and finally the use of GLiTCH in a vision processing module, currently being designed, is described.

DOI:10.1049/ip-e.1989.0050

出版商:IEE    

年代:1989

数据来源: IET

摘要:

The paper describes a number of techniques for using content-addressable memory to speed up the execution of logic programs for both single and multiple processor implementations. The techniques shown allow for significant speed-ups in unification, clause selection, branch switching, variable handling and garbage collection. For multiple processor implementations, the literal ordering and environment join algorithms are also improved. In addition to the speed improvements, some simplification of software results from performing indexing operations in content-addressable memory.

DOI:10.1049/ip-e.1989.0051

出版商:IEE    

年代:1989

数据来源: IET

摘要:

The effects of hardware limitations and fabrication faults on the fault tolerance of neural associative memories using the Hopfield interconnect topology are investigated. It is shown that neural computing structures are not by definition fault tolerant, and that the degree of tolerance is very sensitive to the assumed physical fault model and to the nature of the stored information.

DOI:10.1049/ip-e.1989.0052

出版商:IEE    

年代:1989

数据来源: IET

摘要:

One of the most intriguing properties of natural neural systems is their ability to control exceedingly sophisticated manipulators like arms, legs or trusses, i.e. to produce a large number of efficient motor commands in real time. This remarkable capability of neural systems is based on parallel information processing. The concepts of parallel information processing are not very well understood, mainly because they differ fundamentally from the algorithmic concepts of sequential information processing prevalent in contemporary computers.

DOI:10.1049/ip-e.1989.0053

出版商:IEE    

年代:1989

数据来源: IET

摘要:

A windmill generator is a high-speed sequence generator capable of producing blocks ofvconsecutive symbols in parallel. It consists ofvfeedback-shift registers linked into a ring. The sequences are identical to those produced by a linear feedback-shift register with feedback polynomial of the special (‘windmill’) formf(t) = α(tv) −tLβ(t−v), where α(t) and β(t) are polynomials of degree less thanL/v. HereL(relatively prime tov) is the degree of the polynomial, and is also the sum of the lengths of the registers making up the windmill. The connections of the windmill generator are directly specificed by the coefficients of α(t) and β(t). The polynomialf(t) must be primitive if the output sequence is to be of maximal period. We have devised a search for windmill polynomials over the binary field that can generate sequences of period 2L− 1 in blocks of sizev= 4, 8, and 16, forLranging over the odd values from 7 to 127. WhenL≡ ±3 mod 8, no irreducible windmill polynomials at all were found. For the other odd values ofL, primitive windmill polynomials seem to occur about twice as frequently as would be expected from probabilistic considerations, so that they are in fact very common. For such values ofL, roughly2/Lof all windmill polynomials with givenvappear to be primitive.

DOI:10.1049/ip-e.1989.0054

出版商:IEE    

年代:1989

数据来源: IET

摘要:

A new method to search for high-rate convolutional codes is achieved by means of a pruned trellis. This makes possible a reduced search procedure that can not be accomplished by standard methods. This new search technique makes use of the concept of the expanded column distance function of a convolutional code. By use of this search procedure, codes are found with an optimum distance profile followed by a maximisation ofdfree. A number of systematic convolution al codes of high rates 3/4, 4/5, 5/6, 6/7, and 3/5 are found and listed in this paper.

DOI:10.1049/ip-e.1989.0055

出版商:IEE    

年代:1989

数据来源: IET