摘要:

The main objective of the TOMP (Torino multiprocessor) project was the development of a frame under which a wide variety of multiple processor systems could be sized up, designed, and built. The frame was not conceived for a specific purpose, the basic goal being to cover a wide area of applications, where the key parameters were the relevance of the distribution of the functions, and the computational needs required by real-time applications. The paper presents the methodologies used throughout the project, describing the development and the use of description and performance evaluation techniques, the choices at the architectural level, the design of a high-performance backplane bus, the basic software developed to make the hardware operational, and the results of some experiments on parallel programming.

DOI:10.1049/ip-e.1989.0031

出版商:IEE    

年代:1989

数据来源: IET

摘要:

A new array processor architecture for two-dimensional (2D) FIR digital filters is developed. The processor has two processing rates for processing 2D signals in two directions. It processes the input signal using a row-by-row scheme. Owing to its high speed (about 30 images per second), it can be used for real-time image processing.

DOI:10.1049/ip-e.1989.0032

出版商:IEE    

年代:1989

数据来源: IET

摘要:

The author investigates and summarises some of the computational tasks of discrete transforms in which block diagonal structure plays a dominant role. Walsh-Hadamard transform (WHT) based algorithm designs for various well known discrete transforms are presented; it can be proved that, owing to their block diagonal structure, the WHT based discrete transforms are more efficient than those of the conventional radix-ralgorithms for transforms of lengthN≤ 64. It is proved that block diagonal structures exist in the running Waish-Hadamard transform, the running discrete Hartley transform (DHT), and the running discrete cosine transform (OCT).With regard to block diagonal structure in the transform conversions between DHT and DCT, some existing research results are summarised, and an efficient architecture for generating multiple discrete transform simultaneously is proposed. The two-stage DFT algorithm proposed by Ersoy is extended to that of the DHT and it is proved that two stage DHTs possess a somewhat more interesting 'balanced-block-diagonal' structure. In the context of VLSI system design, two factors are of particular importance: the regularity of processor cells and local communication between processors. The hardware implementation of the block diagonal algorithm, for moderateN, just meets the above requirements. An example of the WHT/DHT is also included.

DOI:10.1049/ip-e.1989.0033

出版商:IEE    

年代:1989

数据来源: IET

摘要:

The implementation of finite sequential machines by using a programmable array logic to synthesise their combinational part is considered. A critical view of the efficiency of existing methods to carry out the state assignment of these machines is given, and it is shown that we can derive a bound on the number of state variables beyond which even an arbitrary coding usually leads to better results in terms of area occupation. It is suggested in the paper that this bound can still be found when more refined area estimates are used.

DOI:10.1049/ip-e.1989.0034

出版商:IEE    

年代:1989

数据来源: IET

摘要:

In the paper, we present the results of our study using a recursive discrete Hartley transform technique to compute discrete Fourier transforms. We also introduce an improved in-place and in-order prime-factor mapping to effectively realise composite-length DFTs. In using these new techniques, the speed of computation is comparable to that of the Winograd Fourier transform algorithm (WFTA), whereas the program size of the present approach is much smaller than that of the WFTA. This approach is most suitable for the cases where there are restrictions on program lengths.

DOI:10.1049/ip-e.1989.0035

出版商:IEE    

年代:1989

数据来源: IET

摘要:

The paper deals with the measurement of error propagation properties of Boolean functions and permutations. We have considered two such measurements. The first describes the output response when a single-bit input change occurs. The second characterises the output for double-bit changes. Those two measurements (in the paper termed indicators) have been applied to the permutations used in the DES and to the permutations generated by exponentiation.

DOI:10.1049/ip-e.1989.0036

出版商:IEE    

年代:1989

数据来源: IET

摘要:

The paper introduces the design and implementation of a text retrieval hardware unit. After surveying a number of hardware text retrieval packages, it proposes a linguistic approach, in which the retrieval is treated as a regular expression which can be recognised by a finite state machine. The design of a finite state machine interpreter is given, and the problems of compiling a regular expression for this interpreter discussed. The algorithm for the compilation is given. Performance figures for the hardware, when connected to real systems, are given.

DOI:10.1049/ip-e.1989.0037

出版商:IEE    

年代:1989

数据来源: IET

摘要:

In the paper, an estimator of the complexity of a binary decision graph is introduced. Based on this, an essentially tabular method of binary decision graph minimisation is presented. The method covers multiple-valued, incompletely specified Boolean systems. The method is well-structured and easily programmable.

DOI:10.1049/ip-e.1989.0038

出版商:IEE    

年代:1989

数据来源: IET

摘要:

The definition of Shannon's entropy in the context of information theory is critically examined and some of its applications to image processing problems are reviewed. A new definition of classical entropy based on the exponential behaviour of information-gain is proposed along with its justification. Its properties also include those of Shannon's entropy. The concept is then extended to fuzzy sets for defining a non-probabilistic entropy and to grey tone image for defining its global, local and conditional entropy. Based on those definitions, three algorithms are developed for image segmentation. The superiority of these algorithms is experimentally demonstrated for a set of images having various types of histogram.

DOI:10.1049/ip-e.1989.0039

出版商:IEE    

年代:1989

数据来源: IET

摘要:

The paper examines systematically the error properties of binary rate multipliers (BRMs). Simple close-form expressions for the maximum pulse-position and counting errors are given for a number of timing variants. It is seen from the paper that the so far reported estimates of the errors, valid for a certain timing variant, are too optimistic in general. A brief discussion of the effect on the errors of a frequency divider applied to the output of the BRM is also provided.

DOI:10.1049/ip-e.1989.0040

出版商:IEE    

年代:1989

数据来源: IET