IEE Proceedings G (Electronic Circuits and Systems)


ISSN: null        年代:1987
当前卷期:Volume 134  issue 6     [ 查看所有卷期 ]

年代:1987
 
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     Volume 134  issue 6
1. Cost reduction of Monte Carlo yield estimates
  IEE Proceedings G (Electronic Circuits and Systems),   Volume  134,   Issue  6,   1987,   Page  249-258

I.W.Jones,   R.Spence,  

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2. Switched-capacitor ladder filters with offset-insensitive time-continuous feedback integrators
  IEE Proceedings G (Electronic Circuits and Systems),   Volume  134,   Issue  6,   1987,   Page  259-264

T.Fülöp,   F.Montecchi,  

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3. Optimisation of parasitic insensitive switched capacitor biquads
  IEE Proceedings G (Electronic Circuits and Systems),   Volume  134,   Issue  6,   1987,   Page  265-275

J.C.M.Bermudez,   B.B.Bhattacharyya,  

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4. Simulatable timing model for MOS logic circuit
  IEE Proceedings G (Electronic Circuits and Systems),   Volume  134,   Issue  6,   1987,   Page  276-284

Shyh-Jye Jou,   Wen-Zen Shen,   Chein-Wei Jen,   Chung-Len Lee,  

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5. Method of designing doubly terminated lossy ladder filters with increased element tolerances
  IEE Proceedings G (Electronic Circuits and Systems),   Volume  134,   Issue  6,   1987,   Page  285-291

B.D.Rakovich,   V.D.Pavlovic,  

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6. Active-Rmultiphase oscillators
  IEE Proceedings G (Electronic Circuits and Systems),   Volume  134,   Issue  6,   1987,   Page  292-294

M.T.Abuelma'atti,   W.A.Almansoury,  

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