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1. |
Cost reduction of Monte Carlo yield estimates |
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IEE Proceedings G (Electronic Circuits and Systems),
Volume 134,
Issue 6,
1987,
Page 249-258
I.W.Jones,
R.Spence,
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摘要:
Three methods for reducing the cost of Monte Carlo yield estimates are presented and evaluated. The first method makes use of the positions of the passing and failing points to enhance the yield estimate obtained from the crude Monte Carlo yield analysis. The second and third methods make use of lst-order performance sensitivity values to estimate the performance of samples without carrying out further circuit analyses. Evaluation of the methods was carried out on three theoretical problems and also on a Sallen and Key filter circuit. Results presented indicate that savings of up to 80% of the circuit simulation costs can be achieved. The experimental results suggest that still further improvements could be made to the yield estimation methods, and a proposal for such an improvement is presented.
DOI:10.1049/ip-g-1.1987.0039
出版商:IEE
年代:1987
数据来源: IET
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2. |
Switched-capacitor ladder filters with offset-insensitive time-continuous feedback integrators |
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IEE Proceedings G (Electronic Circuits and Systems),
Volume 134,
Issue 6,
1987,
Page 259-264
T.Fülöp,
F.Montecchi,
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PDF (699KB)
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摘要:
The possibilities of designing high-order switched-capacitor (SC) ladder filters which are insensitive to the DC offset voltage and at the same time guarantee that all operational amplifiers operate permanently in their active region are investigated. The proposed circuit technique is based on an offset-insensitive fully differential topology, where all operational amplifiers are maintained in the active region by time continuous feedback capacitors. The damping introduced by these additional capacitors leads to a lossy SC ladder filter. A comparative example between a lossless and a lossy 5th-order allpole ladder filter is given in terms of Monte-Carlo sensitivity simulation, showing how the suggested technique can show similar performances. The effect of the finite operational amplifier DC gain on the frequency response of the lossy SC ladder filters can be compensated by the use of a simple predistortion method. The technique seems to be attractive for GaAs technology, where real operational amplifiers can put serious limitations on monolithic analogue designs.
DOI:10.1049/ip-g-1.1987.0040
出版商:IEE
年代:1987
数据来源: IET
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3. |
Optimisation of parasitic insensitive switched capacitor biquads |
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IEE Proceedings G (Electronic Circuits and Systems),
Volume 134,
Issue 6,
1987,
Page 265-275
J.C.M.Bermudez,
B.B.Bhattacharyya,
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PDF (1260KB)
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摘要:
A powerful technique is described for the optimisation of parasitic insensitive switched capacitor (SC) biquads. The proposed method minimises the total capacitance and the component spread necessary for realising a 2nd-order transfer function by a parasitic insensitive SC network. The increase in the network insensitivities due to the minimisation of the total capacitance is controlled by multiple criteria optimisation techniques. The method allows the optimisation to be performed with a variable network topology without, however, requiring large computational times. The number of components in the final network is limited and the dynamic range of the filter is also controlled. An example is given which demonstrates the possibility of considerable design improvement by using the proposed technique.
DOI:10.1049/ip-g-1.1987.0041
出版商:IEE
年代:1987
数据来源: IET
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4. |
Simulatable timing model for MOS logic circuit |
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IEE Proceedings G (Electronic Circuits and Systems),
Volume 134,
Issue 6,
1987,
Page 276-284
Shyh-Jye Jou,
Wen-Zen Shen,
Chein-Wei Jen,
Chung-Len Lee,
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PDF (1028KB)
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摘要:
A simulatable logic circuit timing model is presented. This timing model is derived from the timing behaviour of MOS devices during transients. Analyses of the errors produced by the use of Newton-Raphson methods to linearise MOS devices and numerical integration algorithms to discretise derivative operators are carried out. Based on these analyses and simulation results the best algorithms are chosen to construct the simulatable timing model. This simulatable timing model consists only of conductances and independent current sources, so is easily incorporated with a lookup table model. A local variable time step control scheme based on the characteristics of the parameters and a simple equation, is implemented, to enhance the simulation speed. A simulator is implemented and the simulated results show that its simulation speed is over 200 times faster than SPICE2G.5 with comparable accuracy.
DOI:10.1049/ip-g-1.1987.0042
出版商:IEE
年代:1987
数据来源: IET
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5. |
Method of designing doubly terminated lossy ladder filters with increased element tolerances |
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IEE Proceedings G (Electronic Circuits and Systems),
Volume 134,
Issue 6,
1987,
Page 285-291
B.D.Rakovich,
V.D.Pavlovic,
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PDF (768KB)
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摘要:
A well established technique to increase the element tolerances in the design of selective passive filters, or to decrease the adverse effect of limited gain-bandwidth product of operational amplifiers is to use transfer function with a special type of magnitude response for which the passband ripple amplitude decreases with increasing frequency. Recently various techniques have been reported to construct this type of filtering function but they are either entirely numerical or, at least, require numerical optimisation of some relevant parameters. Two exact methods are proposed to find the explicit expressions for the predistorted characteristic functions of these filters applicable to both polynomial filters and filters with finite attenuation poles (real or complex) of any degree. The ratio of the magnitude of the first passband ripple to that of the last passband ripple can be prescribed in advance, according to the required specifications. Also a new method is presented of designing lossy ladder filters built with components having any dissipation factor. This method reduces to a simple algorithm suitable for computer implementation. Optimisation is performed in complex frequency domain, and partial derivatives in transfer function poles are determined in explicit form.
DOI:10.1049/ip-g-1.1987.0045
出版商:IEE
年代:1987
数据来源: IET
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6. |
Active-Rmultiphase oscillators |
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IEE Proceedings G (Electronic Circuits and Systems),
Volume 134,
Issue 6,
1987,
Page 292-294
M.T.Abuelma'atti,
W.A.Almansoury,
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PDF (393KB)
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摘要:
A multiphase active-Roscillator circuit is presented. The oscillator can producemsignals equal in amplitude and equally spaced in phase. The circuit uses one operational amplifier for each phase. Experimental results are included.
DOI:10.1049/ip-g-1.1987.0046
出版商:IEE
年代:1987
数据来源: IET
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